#ifndef __BB_DEF_H__
#define __BB_DEF_H__

#include <stdint.h>

typedef struct{
	uint16_t interIdx;
	uint16_t intraIdx;
}BBE_CFARRST_T;

#define BBE_ABUF_BASE           				   ((uint32_t)0x30000000)
#define BBE_ABUF0_BASE          				   ((uint32_t)0x30000000)
#define BBE_ABUF1_BASE          				   ((uint32_t)0x30004000)
#define BBE_ABUF2_BASE          				   ((uint32_t)0x30008000)
#define BBE_BUF_ABS_OFFSET      				   ((uint32_t)0x00010000)
#define BBE_ABUF0_CMPLX_BASE               ((uint32_t)0x30020000)
#define BBE_ABUF1_CMPLX_BASE               ((uint32_t)0x30028000)
#define BBE_ABUF2_CMPLX_BASE               ((uint32_t)0x30030000)
#define BBE_REGB_BASE           				   ((uint32_t)0x30080000)

#define BBE_ABUF0_OFFSET                   ((uint32_t)0x0)
#define BBE_ABUF1_OFFSET                   ((uint32_t)0x4000)
#define BBE_ABUF2_OFFSET                   ((uint32_t)0x8000)
/**********************************BIT Pos**********************************/
#define BB_BIT31_POS                           (31)
#define BB_BIT30_POS                           (30)
#define BB_BIT29_POS                           (29)
#define BB_BIT28_POS                           (28)
#define BB_BIT27_POS                           (27)
#define BB_BIT26_POS                           (26)
#define BB_BIT25_POS                           (25)
#define BB_BIT24_POS                           (24)
#define BB_BIT23_POS                           (23)
#define BB_BIT22_POS                           (22)
#define BB_BIT21_POS                           (21)
#define BB_BIT20_POS                           (20)
#define BB_BIT19_POS                           (19)
#define BB_BIT18_POS                           (18)
#define BB_BIT17_POS                           (17)
#define BB_BIT16_POS                           (16)
#define BB_BIT15_POS                           (15)
#define BB_BIT14_POS                           (14)
#define BB_BIT13_POS                           (13)
#define BB_BIT12_POS                           (12)
#define BB_BIT11_POS                           (11)
#define BB_BIT10_POS                           (10)
#define BB_BIT9_POS                            (9)
#define BB_BIT8_POS                            (8)
#define BB_BIT7_POS                            (7)
#define BB_BIT6_POS                            (6)
#define BB_BIT5_POS                            (5)
#define BB_BIT4_POS                            (4)
#define BB_BIT3_POS                            (3)
#define BB_BIT2_POS                            (2)
#define BB_BIT1_POS                            (1)
#define BB_BIT0_POS                            (0)

/*********************************PREP*******************************************/
//cfg0
#define PREP_CFG0_SAMP_EDGE_N                 (0)
#define PREP_CFG0_SAMP_EDGE_P                 (1)

#define PREP_CFG0_ADC_CLK_MODE_P              (1)
#define PREP_CFG0_ADC_CLK_MODE_N              (0)
//cfg1
#define PREP_CFG1_ADC_DSIZE_8BIT              (0)
#define PREP_CFG1_ADC_DSIZE_16BIT             (1)

#define PREP_CFG1_CIC_SEC0     				        (0)
#define PREP_CFG1_CIC_SEC1     				        (1)
#define PREP_CFG1_CIC_SEC2     				        (2)
#define PREP_CFG1_CIC_SEC3     				        (3)
#define PREP_CFG1_CIC_SEC4     				        (4)

#define PREP_CFG1_DOWN_FAC_1    		  		    (0)
#define PREP_CFG1_DOWN_FAC_2     				      (1)
#define PREP_CFG1_DOWN_FAC_3    		  		    (2)
#define PREP_CFG1_DOWN_FAC_4     				      (3)
#define PREP_CFG1_DOWN_FAC_5    		  		    (4)
#define PREP_CFG1_DOWN_FAC_6     				      (5)
#define PREP_CFG1_DOWN_FAC_7    		  		    (6)
#define PREP_CFG1_DOWN_FAC_8     				      (7)
#define PREP_CFG1_DOWN_FAC_9    		  		    (8)
#define PREP_CFG1_DOWN_FAC_10     				    (9)
#define PREP_CFG1_DOWN_FAC_11    		  		    (10)
#define PREP_CFG1_DOWN_FAC_12     				    (11)
#define PREP_CFG1_DOWN_FAC_13    		  		    (12)
#define PREP_CFG1_DOWN_FAC_14     				    (13)
#define PREP_CFG1_DOWN_FAC_15    		  		    (14)
#define PREP_CFG1_DOWN_FAC_16     				    (15)
//cfg2
#define PREP_CFG2_BASEMODE_ABUF0              (0)
#define PREP_CFG2_BASEMODE_ABUF1              (1)
#define PREP_CFG2_BASEMODE_ABUF2              (2)

#define PREP_CFG2_CIRC_EN                     (1)
#define PREP_CFG2_CIRC_DIS                    (0)

#define PREP_CFG2_INTER_MODEx1                 (0) //interInc=samPt*1
#define PREP_CFG2_INTER_MODEx2                 (1) //interInc=samPt*2
#define PREP_CFG2_INTER_MODEx4                 (2) //interInc=samPt*4

typedef struct{
	uint8_t rx_num;
	uint16_t chirp_num;
	uint8_t samp_pt;
	uint8_t tim_rma;	
	uint8_t samp_edge;
	uint8_t adc_clk_mode;	
}PREP_CFG0;
typedef struct{
	uint8_t adc_dsize;
	uint8_t cic_sec;
	uint8_t down_fac;	
}PREP_CFG1;
typedef struct{
	uint8_t baseMode;
	uint8_t circ_en;
	uint8_t interMode;
}PREP_CFG2;

typedef struct 
{
	PREP_CFG0 cfg0;
	PREP_CFG1 cfg1;
	PREP_CFG2 cfg2;
}STRUCT_BBE_PREP;
/*********************************P2*******************************************/
#define P2_FIX2PF_LSFB_0BIT                    (0)
#define P2_FIX2PF_LSFB_2BIT                    (1)
#define P2_FIX2PF_LSFB_4BIT                    (2)
#define P2_FIX2PF_LSFB_6BIT                    (3)

#define P2_MAX_CLR_EN                          (1)
#define P2_MAX_CLR_DIS                         (0)

#define P2_FFT_MODE_DIS                        (0) //memory
#define P2_FFT_MODE_EN                         (1) //FFT

#define P2_DMA_DSIZE_8BIT                      (0) 
#define P2_DMA_DSIZE_16BIT                     (1) 
#define P2_DMA_DSIZE_32BIT                     (2) // 8bit/16bit: fix2pf    32bit: original

#define P2_RSF_DIV1                            (0)
#define P2_RSF_DIV2                            (1) // /2
#define P2_RSF_DIV4                            (2) // /4
#define P2_RSF_DIV8                            (3) // /8
#define P2_RSF_DIV16                           (4) // /16
#define P2_RSF_DIV32                           (5) // /32
#define P2_RSF_DIV64                           (6) // /64
#define P2_RSF_DIV128                          (7) // /128
#define P2_RSF_DIV256                          (8) // /256


#define P2_SUBMODE_0                           (0) //cpx  +/*  (ACC+ADD+MUL+MAC)
#define P2_SUBMODE_1                           (1) //abs +  (ACC+ADD)
#define P2_SUBMODE_2                           (2) //cpx -  (ADD)

#define P2_MODE_ACC                               (0) //ACC
#define P2_MODE_ADD                               (1) //ADD
#define P2_MODE_MUL                               (2) //MUL
#define P2_MODE_MAC                               (3) //MAC
#define P2_MODE_DMA                               (4) //DMA
#define P2_MODE_NCO                               (5) //NCO

#define P2_NCO_MODE1                             (1) //COS
#define P2_NCO_MODE2                             (2) //SIN
#define P2_NCO_MODE3                             (3) //COS+SIN


#define BBE_P2_CFG0(intraCnt,fix2pfLsfB,max_clr,p2_fft_mode,dma_dsize,rsfBit,sub_mode,mode)    			 (bbe_regb_str->P2_CFG0 =\
																																																		 (intraCnt   )<< BB_BIT20_POS |\
																																																		 (fix2pfLsfB )<< BB_BIT17_POS |\
																																																		 (max_clr    )<< BB_BIT16_POS |\
																																																		 (p2_fft_mode)<< BB_BIT14_POS |\
																																																		 (dma_dsize  )<< BB_BIT12_POS |\
																																																		 (rsfBit     )<< BB_BIT8_POS  |\
																																																		 (sub_mode   )<< BB_BIT4_POS  |\
																																																		 (mode       )<< BB_BIT0_POS  )

#define BBE_P2_CFG1(jumpCnt,interCnt)              (bbe_regb_str->P2_CFG1 = (jumpCnt      )<< BB_BIT12_POS |(interCnt     )<< BB_BIT0_POS)
#define BBE_P2_CFG2(ncoMode,nco_fcw)               (bbe_regb_str->P2_CFG2 = (ncoMode      )<< BB_BIT24_POS |(nco_fcw      )<< BB_BIT0_POS)																	
#define BBE_P2_CFG3(src0JumpInc,src0InterInc)      (bbe_regb_str->P2_CFG3 = (src0JumpInc  )<< BB_BIT16_POS |(src0InterInc )<< BB_BIT0_POS)																			
#define BBE_P2_CFG4(src0IntraInc,src0BaseAddr)     (bbe_regb_str->P2_CFG4 = (src0IntraInc )<< BB_BIT16_POS |(src0BaseAddr )<< BB_BIT0_POS)																			
#define BBE_P2_CFG5(src1JumpInc,src1InterInc)      (bbe_regb_str->P2_CFG5 = (src1JumpInc  )<< BB_BIT16_POS |(src1InterInc )<< BB_BIT0_POS)	
#define BBE_P2_CFG6(src1IntraInc,src1BaseAddr)     (bbe_regb_str->P2_CFG6 = (src1IntraInc )<< BB_BIT16_POS |(src1BaseAddr )<< BB_BIT0_POS)	
#define BBE_P2_CFG7(dstJumpInc,dstInterInc)        (bbe_regb_str->P2_CFG7 = (dstJumpInc   )<< BB_BIT16_POS |(dstInterInc  )<< BB_BIT0_POS)	
#define BBE_P2_CFG8(dstIntraInc,dstBaseAddr)       (bbe_regb_str->P2_CFG8 = (dstIntraInc  )<< BB_BIT16_POS |(dstBaseAddr  )<< BB_BIT0_POS)	

#define BBE_P2_STA0_MAXJUMPIDX                    ((bbe_regb_str->P2_STA0 & 0x3FF00000)>>BB_BIT20_POS)
#define BBE_P2_STA0_MAXINTERIDX                   ((bbe_regb_str->P2_STA0 & 0xFFC00)   >>BB_BIT10_POS)
#define BBE_P2_STA0_MAXINTRAIDX                   ( bbe_regb_str->P2_STA0 & 0x3FF)
/*********************************CFAR*******************************************/
#define CFAR_PEAKDET_EN                           (1)
#define CFAR_PEAKDET_DIS                          (0)
																								  
#define CFAR_CFARMODE_GO                          (0)  //GO
#define CFAR_CFARMODE_SO                          (1)  //SO
#define CFAR_CFARMODE_CA                          (2)  //CA

#define CFAR_WKMODE_CFAR                          (0)  //CFAR
#define CFAR_WKMODE_FIX                           (1)  //fix thres
#define CFAR_WKMODE_SUM                           (2)  //thresSum

#define CFAR_THRESDIV1                       			(0)
#define CFAR_THRESDIV2											 			(1)
#define CFAR_THRESDIV4											 			(2)
#define CFAR_THRESDIV8											 			(3)
#define CFAR_THRESDIV16										   			(4)








#define CFAR_DIVFAC1                            	(0)
#define CFAR_DIVFAC2                        			(1)
#define CFAR_DIVFAC4                        			(2)
#define CFAR_DIVFAC8                        			(3)
#define CFAR_DIVFAC16                       			(4)
#define CFAR_DIVFAC32                       			(5)



#define BBE_CFAR_CFG0(pdEn,cfarMode,wkMode)			(bbe_regb_str->CFAR_CFG0 = (pdEn)<< BB_BIT8_POS |(cfarMode  )<< BB_BIT4_POS|(wkMode)<< BB_BIT0_POS)
#define BBE_CFAR_CFG1(interCnt,intraCnt)			  (bbe_regb_str->CFAR_CFG1 = (interCnt)<< BB_BIT12_POS |(intraCnt)<< BB_BIT0_POS)
#define BBE_CFAR_CFG2(wrapDirA,wrapDirB,thresDiv,divFac,mulFac,searchSize,guardSize)			(bbe_regb_str->CFAR_CFG2 = (wrapDirA)  << BB_BIT25_POS|\
																																																										 (wrapDirB)  << BB_BIT24_POS|\
																																																										 (thresDiv)  << BB_BIT20_POS|\
																																																										 (divFac)    << BB_BIT16_POS|\
																																																										 (mulFac)    << BB_BIT8_POS|\
																																																										 (searchSize)<< BB_BIT4_POS|\
																																																										 (guardSize) << BB_BIT0_POS)
#define BBE_CFAR_CFG3(cutThres)									(bbe_regb_str->CFAR_CFG3 = (cutThres)<< BB_BIT0_POS)
#define BBE_CFAR_CFG4(targetLim)								(bbe_regb_str->CFAR_CFG4 = (targetLim)<< BB_BIT0_POS)
#define BBE_CFAR_CFG5(srcInterInc)							(bbe_regb_str->CFAR_CFG5 = (srcInterInc)<< BB_BIT0_POS)
#define BBE_CFAR_CFG6(srcIntraInc,srcBaseAddr)	(bbe_regb_str->CFAR_CFG6 = (srcIntraInc)<< BB_BIT16_POS |(srcBaseAddr)<< BB_BIT0_POS)
#define BBE_CFAR_CFG7(wrapAddrA,wrapAddrB)			(bbe_regb_str->CFAR_CFG7 = (wrapAddrA)<< BB_BIT16_POS|(wrapAddrB)<< BB_BIT0_POS)
#define BBE_CFAR_CFG8(dstBaseAddr)							(bbe_regb_str->CFAR_CFG8 = (dstBaseAddr)<< BB_BIT0_POS)
/*********************************FFT*******************************************/
#define FFT_PT16                               (0)
#define FFT_PT32                               (1)
#define FFT_PT64                               (2)
#define FFT_PT128                              (3)
#define FFT_PT256                              (4)

#define FFT_MODE_FORWARD             					 (0)
#define FFT_MODE_INVERSE             					 (1)

#define FFT_WIN_SIZE_14BIT           		 			 (0)
#define FFT_WIN_SIZE_32BIT           		 			 (1)
																							 		
#define FFT_WIN_EN                   		 			 (1)
#define FFT_WIN_DIS                  		 			 (0)

#define BBE_FFT_CFG0(inPt,fftPt,mode)              (bbe_regb_str->FFT_CFG0 = (inPt)<< BB_BIT8_POS |(fftPt)<< BB_BIT4_POS|(mode)<<BB_BIT0_POS)
#define BBE_FFT_CFG1(useA,useB)             			 (bbe_regb_str->FFT_CFG1 = (useA)<< BB_BIT8_POS |(useB)<< BB_BIT0_POS)
#define BBE_FFT_CFG2(winBaseAddr,winSize,winEn)    (bbe_regb_str->FFT_CFG2 = ((uint32_t)(winBaseAddr)<<BB_BIT16_POS|(winSize)<< BB_BIT1_POS |(winEn)<< BB_BIT0_POS))

/*********************************BBE reg*******************************************/
typedef struct
{
    __IO uint32_t PREP_CFG0;        // 0x00
    __IO uint32_t PREP_CFG1;        // 0x04
    __IO uint32_t PREP_CFG2;        // 0x08
         uint32_t res0[2];          // 0x0C, 0x10
    __IO uint32_t PREP_STA0;        // 0x14
         uint32_t res1[2];          // 0x18, 0x1C
    __IO uint32_t P2_CFG0;          // 0x20
    __IO uint32_t P2_CFG1;          // 0x24
    __IO uint32_t P2_CFG2;          // 0x28
    __IO uint32_t P2_CFG3;          // 0x2C
    __IO uint32_t P2_CFG4;          // 0x30
    __IO uint32_t P2_CFG5;          // 0x34	
    __IO uint32_t P2_CFG6;          // 0x38
    __IO uint32_t P2_CFG7;          // 0x3C
    __IO uint32_t P2_CFG8;          // 0x40
         uint32_t res2[4];          // 0x44, 0x48, 0x4C, 0x50
    __IO uint32_t P2_STA0;          // 0x54
         uint32_t res3[2];          // 0x58, 0x5C
    __IO uint32_t CFAR_CFG0;        // 0x60
    __IO uint32_t CFAR_CFG1;        // 0x64
    __IO uint32_t CFAR_CFG2;        // 0x68
    __IO uint32_t CFAR_CFG3;        // 0x6C
    __IO uint32_t CFAR_CFG4;        // 0x70
    __IO uint32_t CFAR_CFG5;        // 0x74
    __IO uint32_t CFAR_CFG6;        // 0x78
    __IO uint32_t CFAR_CFG7;        // 0x7C
    __IO uint32_t CFAR_CFG8;        // 0x80
         uint32_t res4[4];          // 0x84, 0x88, 0x8C, 0x90
    __IO uint32_t CFAR_STA0;        // 0x94
         uint32_t res5[2];          // 0x98, 0x9C
    __IO uint32_t FFT_CFG0;         // 0xA0
    __IO uint32_t FFT_CFG1;         // 0xA4
    __IO uint32_t FFT_CFG2;         // 0xA8
         uint32_t res6[2];          // 0xAC, 0xB0
    __IO uint32_t FFT_STA0;         // 0xB4
    __IO uint32_t FFT_STA1;         // 0xB8
         uint32_t res7[5];          // 0xBC, 0xC0, 0xC4, 0xC8, 0xCC
    __IO uint32_t IMR;              // 0xD0
    __IO uint32_t EMR;              // 0xD4
    __IO uint32_t ISR;              // 0xD8
    __IO uint32_t ESR;              // 0xDC
    __IO uint32_t OP_GATE;          // 0xE0
    __IO uint32_t OP_TRIG;          // 0xE4
    __IO uint32_t OP_CLEAR;         // 0xE8
} BBE_REGB_T;



#define BBE_REGB                    ((BBE_REGB_T  *)   BBE_REGB_BASE)

#define BBE_SIZE8        (0x0)
#define BBE_SIZE16       (0x1)
#define BBE_SIZE32       (0x2)
#define BBE_SIZE64       (0x3)
/*********************************IMR*******************************************/
#define BBE_ISR_CFAR_END             (1<<20)
#define BBE_ISR_P2_JUMP_END          (1<<19)
#define BBE_ISR_P2_INTER_END         (1<<18)
#define BBE_ISR_P2_INTRA_END         (1<<17)
#define BBE_ISR_FFT_UNLOAD_END       (1<<16)
#define BBE_ISR_RAMP_NEDGE           (1<< 4)
#define BBE_ISR_RAMP_PEDGE           (1<< 3)
#define BBE_ISR_PREP_FRAME_END       (1<< 2)
#define BBE_ISR_PREP_RAMP_END        (1<< 1)

#define BBE_ISR_CLEAR(val)           (bbe_regb_str->ISR = (uint64_t)(val))
/*********************************OP_GATE*******************************************/
#define BBE_GATE_CFAR                (1<<3)
#define BBE_GATE_P2   		           (1<<2)
#define BBE_GATE_FFT                 (1<<1)
#define BBE_GATE_PREP                (1<<0)
#define BBE_OPGATE_EN(val) (bbe_regb_str->OP_GATE &= ~(uint64_t)(val))
#define BBE_OPGATE_DIS(val) (bbe_regb_str->OP_GATE |= ((uint64_t)(val)))
/*********************************OP_TRIG*******************************************/
#define BBE_TRIG_CFAR           (1<<3)
#define BBE_TRIG_P2             (1<<2)
#define BBE_OPTRIG(val)         (bbe_regb_str->OP_TRIG |= (uint64_t)(val))
/*********************************OP_CLEAR*******************************************/
#define BBE_CLEAR_CFAR               (1<< 3)
#define BBE_CLEAR_P2                 (1<< 2)
#define BBE_CLEAR_FFT                (1<< 1)
#define BBE_CLEAR_PREP               (1<< 0)
#define BBE_OPCLEAR(val)        (bbe_regb_str->OP_CLEAR |= (uint64_t)(val))

/*BUF0*/
#define BBE_ABS_OFFSET   (0x10000)
#define BBE_ABUF0_ABS_BASE  (BBE_ABUF0_BASE+BBE_ABS_OFFSET)
#define BBE_ABUF1_ABS_BASE  (BBE_ABUF1_BASE+BBE_ABS_OFFSET)
#define BBE_ABUF2_ABS_BASE  (BBE_ABUF2_BASE+BBE_ABS_OFFSET)
#define BBE_ABUF0_CPX_BASE  (BBE_ABUF0_BASE+0x20000)
#define BBE_ABUF1_CPX_BASE  (BBE_ABUF1_BASE+0x20000)

#endif
